适用于媒体处理的可重构处理器  

A reconfigurable processor being suitable for multimedia

作　　者：周丹[1] 王新安[1] 戴鹏[1] 叶兆华[1] 

机构地区：[1]北京大学集成微系统科学工程与应用重点实验室,广东深圳518055

出　　处：《华中科技大学学报（自然科学版）》2010年第1期69-72,共4页Journal of Huazhong University of Science and Technology(Natural Science Edition)

基　　金：国家高技术研究发展计划资助项目(2009AA01Z127)

摘　　要：采用阵列处理器的设计方法,提出了一种基于单指令多数据技术的可重构处理器.通过在ReMAP原型芯片实现二维离散余弦变换算法,重新设计乘法累加器、增加局部数据寄存器、增加处理单元间共享寄存器和分层次传输处理单元内数据,提出优化的ReMAP架构,并在现场可编程门阵列上完成功能验证.在Re-MAP架构上实现二维离散余弦变换以及绝对误差和的结果表明,优化的ReMAP架构支持多个算术逻辑单元,充分利用媒体算法的内在并行性,获得了较高的性能加速比.ReMAP架构的可扩展性可进一步提高性能加速比,满足媒体处理的应用.By using an array processor methodology, a reconfigurable processor ReMAP architecture was proposed, which is based on the single instruction multiple data. 2-dimensional discrete cosine transforms （2-D DCT） on the ReMAP prototype chip were implemented, the prototype chip on redesigning the multiple accumulator was optimized, adding the local registers and increasing the sharing registers among the processing element and transfer the data on different levels in the processing element. Based on the optimization, we proposed an optimized ReMAP architecture and verified it on field programming gate array. The result of implementing the 2D-DCT and sum of absolute differences shows that the optimized ReMAP architecture, comparing to the ReMAP prototype chip and other processors, obtains a higher performance speedup. ReMAP supported multiple arithmetic logic unit, and can full use of the inherent parallelism of the media algorithm. The scalable of ReMAP architecture can further improve the performance speedup to meet the media processing applications.

关 键 词：微处理器芯片 多处理器 可重构处理器 多媒体系统 离散余弦变换 绝对误差和 

分 类 号：TP338.7[自动化与计算机技术—计算机系统结构]