基于PC104总线和CPLD的测频模件设计  

Design of Frequency Measuring Module Based on PC104 and CPLD

作　　者：刘国华[1] 何华锋[1] 田鹏飞[1] 王林[2] 

机构地区：[1]第二炮兵工程学院,陕西西安710025 [2]第二炮兵驻孝感地区军事代表室,湖北孝感432100

出　　处：《现代电子技术》2010年第2期86-89,共4页Modern Electronics Technique

基　　金：国家自然科学基金重点课题资助项目(60736026)

摘　　要：根据某测试系统的需要,设计基于PC104总线和CPLD的高精度测频模件,采用多周期同步测频法实现对所测频段的等精度测量。设计了该测频模件的硬件电路,并给出用CPLD实现数字频率计的详细VHDL源代码。采用原理图的方式编写PC104总线的接口逻辑,并利用Max+PlusⅡ软件进行仿真。结果显示频率计及接口逻辑均可正确工作。实际应用表明,该测频模件具有精度高,可靠、稳定等优点。According to the need of some test system,a high- accuracy frequency measuring module is designed based on PC104 and CPLD. A method of synchronous multi - period frequeney measurement is used to achieve the equal precision measure to the tested frequency channel. The hardware circuit of the frequency measuring module is designed. And the detailed VHDL source code to achieve digital frequency using CPLD is given. The interface logic of PC104 bus is compiled using the way of schematic diagram,and the emulation is done by the software of MAXPLUS Ⅱ. The digital frequency and the interface logic are accurately working showed by the result. This frequency measuring module has been proved to be high -accurate,stable and reliable in the practical application.

关 键 词：PC104 CPLD 多周期同步测频 VHDL 

分 类 号：TP391[自动化与计算机技术—计算机应用技术] TP368.1[自动化与计算机技术—计算机科学与技术]