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机构地区:[1]西安电子科技大学技术物理学院,陕西西安710071
出 处:《信息与电子工程》2010年第1期105-110,共6页information and electronic engineering
摘 要:随着集成电路特征尺寸的不断减小,互连线的串扰噪声对工艺波动的灵敏度也在相应增加。通过分析互连几何参数波动对互连寄生参数的影响,得到其近似的函数关系表达式,在此基础上建立了考虑工艺波动的串扰噪声的统计模型。利用该模型可以得到互连串扰噪声均值和标准差的解析表达式。计算结果表明:和HSPICE相比,该方法在确保计算精度的前提下大大缩短了计算时间,在超大规模集成电路互连信号完整性的分析和优化中具有一定的应用前景。As the IC feature size continues to decrease, interconnect cross-talk noise with the process fluctuation is also a corresponding increase in sensitivity. The impact of interconnect process fluctuation on the interconnect cross-talk noise in Very Large Scale Integration(VLSI) was studied and discussed in this study. The approximate function relationships were obtained by analyzing the impact of interconnect geometric parameters fluctuation on the interconnect parasitic parameters. On the basis of these studies, the statistical cross-talk noise model was successfully proposed and built. The expressions of mean and standard deviation of interconnect cross-talk noise could be obtained from this model. Compared with HSPICE, the computation results showed that the time of calculation was greatly shortened with a good calculating precision using the proposed method. It will have a potential bright future in the analysis and optimization of VLSI interconnects signal integrity.
分 类 号:TN405.97[电子电信—微电子学与固体电子学]
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