2.5W低噪声CMOSD类音频功放设计  

Design of a 2.5 W Low Noise CMOS Class D Audio Amplifier

作　　者：黄武康[1] 周长胜[2] 袁国顺[1] 赵海亮[2] 

机构地区：[1]中国科学院微电子研究所,北京100029 [2]中国科学院嘉兴微电子与系统工程中心,浙江嘉兴314006

出　　处：《固体电子学研究与进展》2010年第1期108-113,154,共7页Research & Progress of SSE

基　　金：浙江省科技厅重大科技专项资助项目(2006C14036)

摘　　要：提出了一种基于0.5μm5VCMOS工艺的低噪声PWM调制D类音频功率放大器。该放大器在5V电源电压下以全桥方式可以驱动4Ω负载输出2.5W功率;转换效率等于87%,信噪比达94dB(负载8Ω,输出功率1W);THD+N仅0.05%(负载4Ω,输出功率1W);PSRR为68dB(频率1kHz)。分析了整体电路结构及其线性化模型,并着重介绍了高性能前置斩波稳定运算放大器(开环增益117dB,等效输入噪声16μV.Hz-1/2),线性三角波振荡电路(斜率偏差仅±0.2%)和功率器件、驱动电路的设计。最后给出了D类放大器的测试结果。A low noise class D audio power amplifier with PWM modulation in 0.5 μm 5 V CMOS process is presented. The amplifier is capable of driving 4 Ω load with an output power of 2.5 W from a 5 V power supply. Its power efficiency is about 87% and its SNR is 94 dB at 8 Ω load and 1 W output power; the THD＋N is only 0.05% at 4 Ω load and 1 W output power and the PSRR is about 68 dB at f=1 k Hz. The whole circuit and its linearized model are analyzed. The circuit detail of the high performance chopper-stabilized pre-amplifier with 117 dB open loop gain and 16 μV · Hz^-1/z equivalent input noises, linear triangular waveform generator with ±0.2% slope deviation and power MOSFET device and its drive circuit are also presented. Finally, the experimental results of this work are presented.

关 键 词：D类放大器 脉宽调制 斩波稳定 低噪声 三角波振荡器 线性度 

分 类 号：TN402[电子电信—微电子学与固体电子学] TN722