VHDL在动态存储测试领域中的应用展望  

The Application Forecast of VHDL in Dynamic Storage Measurement Territory

作　　者：秦丽[1] 祖静[1] 张文栋[1] 

机构地区：[1]华北工学院,太原030051

出　　处：《测试技术学报》1998年第3期60-64,共5页Journal of Test and Measurement Technology

摘　　要：VHDL 作为一种硬件描述性语言,主要用于设计大规模的数字硬件系统和电路,随着电路的规模加大,复杂度增加,这种语言的优越性越来越明显,它正在逐渐成为电子设计师们设计数字硬件电路时所必须掌握的工具语言。在动态存储测试领域中,由于被测对象复杂多样,要求一次记录的信息量不断增加,而允许放置测试仪器的空间很小,因此用 VHDL 设计大规模集成电路在动态存储测试领域中具有广泛的应用前景。As a kind of hardware description language, VHDL is applied briefly in designing large-scale digital hardware system and circuit. Along with the increase of the circuit scale and the complexity, the advantage of VHDL is becoming more and more obvious. It gradually becomes the tool language for electrical engineers which must be grasped in designing digital hardware circuit. In dynamic storage measurement field, it is demanded that the amount of recorded information increase gradually for measurement device each time, besides, as the test object is complicated and the space for measurement device is small. Therefore VHDL has widespread application prospect to design large-scale integrated circuit in dynamic storage measurement field.

关 键 词：VHDL 动态存储测试 硬件描述语言 

分 类 号：TN470.7[电子电信—微电子学与固体电子学]