MCS-DMA:一种面向SoC内DMA传输的内存控制器优化设计  

MCS-DMA:An Optimization Design of Memory Controller for DMA Transfers in SoC

作　　者：黄侃[1] 佟冬[1] 刘洋[1] 杨寿贵[1] 程旭[1] 

机构地区：[1]北京大学微处理器研究开发中心,北京100871

出　　处：《电子学报》2010年第3期598-604,共7页Acta Electronica Sinica

基　　金：国客863高技术研究发展计划(No.2006AA010202)

摘　　要：当前主流片上总线协议——AHB存在访存带宽利用率较低的问题.本文基于SoC内DMA传输较多的特点,提出一种新的优化设计:在内存控制器内部增加MCS-DMA模块,并通过驱动程序将MCS-DMA模块与目标DMA传输绑定.一方面实现数据预取,提升了单个DMA传输时的总线带宽利用率;另一方面使访存请求在内存控制器内部流水化完成,提升多个DMA并发时的总线带宽利用率.将该设计应用到北大众志SKSoC后,单个DMA传输时的总线带宽利用率提升至100%,多个DMA并发时的总线带宽利用率从33.3%提升至85.5%,而芯片的设计面积仅增加2.9%.Current mainstream on-chip bus protocol — AHB has a problem that the bandwidth utilization of memory accesses is quite low.This paper proposes a new optimization design based on the feature that there are massive DMA transfers in SoC.Proposed method adds MCS-DMA modules inside the memory controller and bind MCS-DMA modules to target DMA transfers via software drivers.On the one hand,it prefetches data to increase the bandwidth utilization of single DMA transfer;on the other hand,it makes memory requests pipelined inside the memory controller,which increases the bandwidth utilization of multiple parallel DMA transfers.After applying the design to PKUnity-SK SoC,the bus bandwidth utilization when transferring single DMA increases to 100%.When transferring multiple DMAs in parallel,the bus bandwidth utilization increases from 33.3% to 85.5%.However,the chip area only increases by 2.9%.

关 键 词：系统芯片 内存控制器 直接内存访问 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]