1.9GHz低电压低功耗CMOS射频低噪声放大器的设计  

Design of 1.9 GHz low-voltage and low-power CMOS radio-frequency low-noise amplifier

作　　者：周建明[1] 陈向东[1] 兰萍[1] 谢睿[1] 徐洪波[1] 

机构地区：[1]西南交通大学信息科学与技术学院电路与系统研究所,四川成都610031

出　　处：《电子技术应用》2010年第6期53-56,共4页Application of Electronic Technique

基　　金：教育部新世纪优秀人才支持计划项目(A0160419950120)

摘　　要：针对1.9GHzPHS和DECT无线接入系统的应用,提出了一种可工作于0.9V低电压的CMOS射频低噪声放大器,并对其电路结构、噪声及线性度等主要性能进行分析。该电路基于传统的折叠结构低噪声放大器,利用晶体管线性补偿技术,实现了低压低功耗下的高线性度。采用TSMC 0.18μm CMOS工艺模型设计与验证。A radio-frequency CMOS low-noise amplifier which can operate at 0.9 V supply voltages for 1.9 GHz wireless access system of PHS and DECT applications is proposed and its circuit structure, noise and linearity analysis are also presented. Contrary to the conventional folded low noise amplifier. The circuit is based on folded cascode stage structure which uses transistor nonlinear compensation technology to realize high linearity under low-vohage and low-power. The design is realized by TSMC 0.18 μm CMOS technology. Key

关 键 词：低电压 低功耗 低噪声放大器 噪声系数 线性度 

分 类 号：TN722.25[电子电信—电路与系统]