环栅结构CMOS/SOI器件SPICE模型研究  

SPICE Modeling of CMOS/SOI with Gate-Enclosed Layout

作　　者：贺威[1] 张正选[2] 

机构地区：[1]深圳大学电子科学与技术学院,深圳518060 [2]中国科学院上海微系统与信息技术研究所,上海200050

出　　处：《半导体技术》2010年第6期542-545,共4页Semiconductor Technology

摘　　要：建立了环栅结构的CMOS/SOI器件的SPICE模型,可以对抗辐照设计中环栅结构的CMOS/SOI器件计算其等效宽长比,将环栅器件转换为等效宽度和长度的条栅器件;以及对体接触电阻等其他受影响的SPICE模型参数做出调整,使其电学特性模拟达到最准确精度。模拟数据和试验数据具有很好的一致性,证明所建立的模型具有较高的精度。A new accurate SPICE model for CMOS/SOI transistors with gate-enclosed layout is described which can evaluate the aspect ratio of CMOS/SOI for selected gate-enclosed shapes,and turn it into an equivalent standard rectangular FET.The body contact resistance and other parameters are also accurately modeled.A comparison of the theoretical and experimental results is made which shows the adjusted model simulated result is predictions agree well with measured characteristics devices.

关 键 词：环栅 绝缘体上硅 SPICE模型 宽长比 体接触 

分 类 号：TN386.1[电子电信—物理电子学] TN402