可编程逻辑器件安全性漏洞检测平台设计与实现  

Design and Implementation of Security Vulnerability Detection Platform on Programmable Logic Device

作　　者：周丽[1] 李清宝[1] 陈志锋[1] 南煜[1] 

机构地区：[1]信息工程大学信息工程学院,河南郑州450002

出　　处：《信息工程大学学报》2010年第3期326-330,共5页Journal of Information Engineering University

基　　金：国家863计划资助项目(2009AA01Z434)

摘　　要：芯片作为信息存储、传输、应用处理的基础设备,其安全性是信息安全的一个重要组成部分。可编程逻辑器件安全性漏洞检测平台正是为了检测出逻辑芯片内可能存在的攻击后门和设计缺陷而研制的,从而确保电子设备中信息安全可靠。文章研究可编程逻辑器件漏洞检测平台的设计与实现,简要介绍了检测平台的总体结构和运行机制,给出了检测平台的总体设计思想、实现方案及系统组成,并深入研究了漏洞检测平台设计与实现所涉及的相关技术。A Chip is an infrastructure of information storage, transmission and application. Its security is an important part of information security. This paper is aimed at detecting the backdoor attacks and design defects which might be embedded in logic chips, so as to insure the salty and creditabili- ty of the information in electronic equipment. The paper researches the design and implementation of security vulnerability detection platform on programmable logic devices, introduces gross structure and mechanism of detection platform briefly, and shows the design idea, realization, and system composition of security vulnerability detection platform on programmable logic devices. And the design and implementation key technique of the security vulnerability detection platform is surveyed deeply in this paper.

关 键 词：可编程逻辑器件 漏洞检测 攻击后门 孤立状态 

分 类 号：TP393.08[自动化与计算机技术—计算机应用技术]