一种CMOS单片LDO线性稳压器的设计  

Design and Fabrication of a Full on-Chip CMOS Low-Dropout Linear Regulator

作　　者：高雷声[1] 周玉梅[1] 刘海南[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《半导体技术》2010年第7期723-726,共4页Semiconductor Technology

基　　金：国家自然科学基金资助项目(60676015)

摘　　要：提出了一种单片集成的高电源抑制比LDO线性稳压器,主要应用于PLL中VCO和电荷泵的电源供给。该稳压器采用RC补偿方案,与其他补偿方法相比,RC补偿几乎不消耗额外电流。误差放大器采用折叠共源共栅结构,可以提供较高的电源抑制比,并且使得设计的LDO为两级放大器结构,有利于简化补偿网络。所设计的LDO在低频时电源抑制比(PSR)为-69 dB,在1MHz处的电源抑制比为-19 dB。采用0.35μm工艺流片,测试结果表明,该LDO可以为负载提供70 mA的电流。A monolithic integrated high PSR LDO linear regulator is presented mainly used for VCO in PLL and power supply of charge pump.Compared with other conventional compensations,RC compensation does not consume extra current.The error amplifier is folded cascade amplifier,which can provide high gain to improve the PSR of LDO.The proposed LDO is a two-stage amplifier,so the compensation structure can be simplified.The PSR of the LDO is-69 dB at low frequency,and-19 dB at 1 MHz. The full on-chip LDO was fabricated with commercial 0.35 μm CMOS technology.Experimental results show that the LDO is capable of sourcing an output current up to 70 mA.

关 键 词：线性稳压器 单片集成 高电源抑制比 RC补偿 单片集成低压差 

分 类 号：TN433[电子电信—微电子学与固体电子学]