安全加密微处理器结构与设计  

Architecture and design of a secure encrypted microprocessor

作　　者：刘政林[1] 龚明杨[1] 刘政[1] 霍文捷[1] 

机构地区：[1]华中科技大学电子科学与技术系,湖北武汉430074

出　　处：《华中科技大学学报（自然科学版）》2010年第8期81-84,共4页Journal of Huazhong University of Science and Technology(Natural Science Edition)

基　　金：国家自然科学基金资助项目(60973034);新世纪优秀人才支持计划资助项目(NCET-07-0328)

摘　　要：提出的安全加密嵌入式处理器集成了RSA,AES,DES/3DES和SHA硬件加密引擎,提供程序、数据与总线加密机制以及系统级加密支持,可适用于各种不同安全等级需求的嵌入式系统.在设计中采用多种优化算法以在成本、性能与安全性之间取得良好平衡,最终采用华虹NEC0.25μm工艺实现ASIC流片,样片测试结果表明设计正确.With a wide range of embedded processor applications, unauthorized stealing, tampering, as well as bus monitor bring enormous challenges for the security of user＇s programs and sensitive data. RSA （ron rivest adishamir leonard adleman）, AES （advanced encyption standard）, DES （data encryption standard）/3DES （triple data encryption standard） and SHA （secure Hash algorithm） hard- ware encryption engine were integrated in the secure encrypted microprocessor to support program, data and bus encryption in different security level using areas. In the design, we used a variety of optimization algorithms to make a good balance between cost, performance and safety. We completee a small area of implementation, and finally we achieve the taping out of ASIC （application specific inter grated circut） with NEC 0.25 μm technology.

关 键 词：超大规模集成电路 微处理器 安全 加密 嵌入式系统 保护 

分 类 号：TP368.1[自动化与计算机技术—计算机系统结构]