数字锁相环与滤波技术在PWM整流器中的应用  

Application of digital phase-locked loop and filtering technique in PWM rectifier

作　　者：付志红[1] 董玉玺[1] 朱学贵[1] 王万宝[1] 张鹏[1] 

机构地区：[1]重庆大学输配电装备及系统安全与新技术国家重点实验室,重庆400044

出　　处：《重庆大学学报（自然科学版）》2010年第7期35-41,共7页Journal of Chongqing University

基　　金：国家自然科学基金资助项目(40874094);输配电装备及系统安全与新技术国家重点实验室自主研究项目(2007DA10512709209);'211工程'三期建设资助项目(S-09111)

摘　　要：三相电压型SVPWM整流器可采用基于MATLAB和FPGA的VHS-ADC高速数字信号处理平台建模,但建模时,三相静止坐标系到两相同步旋转坐标系的Park变换和两相旋转坐标系到两相静止坐标系的变换初相位不定,使变换不能顺利实现,另外,电网电压、电流采集时存在噪声,影响了系统稳定性。在常规的三相电压型SVPWM整流器模型基础上,增加数字锁相环以跟踪电网电压的相位和频率,增加FIR数字滤波器对信号进行处理,减少干扰。在VHS-ADC平台上设计了电压外环PI环节、电流内环PI环节和坐标变换模型。通过小功率实验,三相电压型SVPWM控制系统运行稳定,验证了数字锁相环和FIR数字滤波器应用于三相电压型SVPWM整流器的可行性。VHS-ADC high speed digital signal processing platform based on MATLAB and FPGA could be used to build three-phase voltage source rectifier with space voltage vector PWM（SVPWM）. The initial phase of coordinate transformation from three phase static coordinate to two phase static coordinate which is called Park transformation and from two phase rotating reference frame to two phase static coordinate is uncertain. There existed noise in acquiring grid voltage and current. Digital phase-locked loop is added to follow the frequency and phase of grid voltage, FIR filter is added to process signal and reduce the interference. External voltage control loop, internal current control loop and the model of coordinate transformation are designed on the VHS-ADC platform. The small power experiment is conducted to verify the stability and feasibility of the control system. The experimental results show that the digital phase- locked loop and FIR digital filter can be applied to three-phase voltage source rectifier.

关 键 词：整流器 VHS-ADC平台 FIR滤波器 数字锁相环 

分 类 号：TM461[电气工程—电器]