砷化镓超高速集成电路布线设计——基于门阵的宏元胞方式  

The Routing of GaAs VHSIC Macrocell Based Gate Array

作　　者：李昆仑[1] 郭裕顺[1] 赵国南[1] 

机构地区：[1]杭州电子工业学院微电子CAE研究所

出　　处：《微电子学与计算机》1999年第3期50-53,共4页Microelectronics & Computer

基　　金：国家八五重点攻关项目

摘　　要：文章研究了在ＧａＡｓ工艺、双层金属布线、基于门阵的宏元胞模式下，采用时间驱动算法布局设计（ＴｉｍｉｎｇＤｒｉｖｅｎＰｌａｃｅｍｅｎｔ）的布线算法。算法以芯片性能得到最大限度的改善，包括芯片关键路径时延最短、互连线总长最短、最长互连线最短、布线密度均匀等为目标，从而达到超高速的目的。The routing of GaAs VHSIC gate array using macrocell design and two layers met al wiring is investigated in this paper. An algorithm considering the high speed requirement and performed after the timing driven placement is presented. The o bjective of the algorithm is the optimization of the overall chip performance in cluding the shortest of the total path length, the uniform of the routing densit y, the minimization of the critical path delay and the shortest of the longest p ath. Experimental results are given to illustrate the algorithm.

关 键 词：集成电路 布线 门阵 宏元胞 砷化镓电路 

分 类 号：TN432.02[电子电信—微电子学与固体电子学]