基于FPGA和ARM的控制器设计及在快联锁保护系统中的应用  

Design of a controller based on FPGA & ARM and its application in the SSRF fast interlock system

作　　者：刘鑫[1] 蒋舸扬[1] 沈立人[1] 陈建锋[1] 

机构地区：[1]中国科学院上海应用物理研究所,上海201800

出　　处：《核技术》2010年第9期653-656,共4页Nuclear Techniques

摘　　要：联锁保护系统是上海光源为保护重要设备而设置的控制子系统,快联锁保护系统是其中一部分,其联锁响应时间要小于1ms。本文介绍了一种基于FPGA和ARM的快联锁保护系统的实现方案,该方案利用ARM软件功能强及FPGA逻辑处理灵活和IO资源丰富的特点实现快联锁的功能。本文简要介绍了系统的设计方案和硬件结构,及该控制器的测试结果。The interlock system is a control subsystem designed to protect essential equipment of Shanghai Synchrotron Radiation Facility（SSRF）.As a part of the interlock system,the fast interlock system based on FPGA and ARM acts within 1 ms after a vacuum leak signal is given.In this paper,we describe the implementation of the fast interlock system.The design makes use of strong software capacity of the ARM,flexible logic process capability of FPGA,and rich IO resources to achieve the response time requirements of the system.The system solutions,hardware architecture and the test result of the controller are given,too.

关 键 词：快联锁保护系统 FPGA ARM 

分 类 号：TP277[自动化与计算机技术—检测技术与自动化装置]