基于FPGA的混沌信号发生器的设计与实现  

Design and implementation of chaotic signal generator based on FPGA

作　　者：刘玉民[1] 张雨虹[2] 姚明林[1] 

机构地区：[1]唐山学院信息工程系,河北唐山063000 [2]唐山学院计算机科学与技术系,河北唐山063000

出　　处：《计算机工程与设计》2010年第18期3972-3974,共3页Computer Engineering and Design

基　　金：唐山市科学技术研究与发展计划基金项目(07160203B-3)

摘　　要：提出了基于FPGA设计混沌信号发生器的改进方法。采用Euler算法将连续混沌系统转换为离散混沌系统;基于IEEE-754单精度浮点数标准和模块化设计理念,使用Quartus II软件,采用VHDL和原理图相结合的方式设计混沌信号发生器。最后,在FPGA实验系统上进行实验,在示波器上显示了混沌吸引子的相图及时域混沌信号。由于采用了基于数据选择器的面积优化方法,复用耗费逻辑资源较多的浮点运算模块,大大减少了混沌信号发生器所占用的FPGA逻辑资源。实验结果表明了该方法的有效性和通用性。An improved approach for the design of chaotic signal generator based on FPGA is proposed. Firstly, using Euler algorithm, the continuous chaotic systems can be converted to discrete chaotic systems. Secondly, according to IEEE-754 standard and module- based design idea, chaotic system is designed by the way of VHDL and logic diagram based on Quartus II software. Finally, chaotic signals are output through FPGA experimental setup and can be observed by the oscillograph. During the design process, several data selectors are used to share float-operating module which occupy lots of logic elements, as result logic elements reduced greatly due to area optimization. Experimental result verify its effectiveness and universlity.

关 键 词：混沌 现场可编程门阵列 IEEE-754标准 面积优化 浮点乘法器 

分 类 号：TN431.2[电子电信—微电子学与固体电子学] TN918