CPCI系统中PCI总线接口技术研究  

The PCI bus Interface Technology Research in CPCI System

作　　者：孔超[1] 谢时根 刘垚[1] 吴长瑞[1] 李加蕾 蔡慧智[1] 

机构地区：[1]中科院声学研究所,北京100190 [2]北京中科海讯电子科技有限公司,北京100190 [3]天津赛乐新创通信技术有限公司

出　　处：《微计算机应用》2010年第10期50-56,共7页Microcomputer Applications

摘　　要：为构建一个紧凑、灵活的CPCI系统,在IP核的基础上,采用FPGA来实现PCI总线接口电路。为克服PCI核突发传送过程中存在的问题,提出了一种基于双口RAM的带备份功能的同步FIFO和主设备突发传送模块的设计。在驱动开发的基础上,对该接口电路和PLX公司生产的PLX9056的PCI总线的实测性能进行了比较。比较结果表明,基于IP核的PCI接口电路总体性能优于PLX9056。To construct a compact and flexible CPCI system,the PCI interface circuit is implemented by FPGA based on IP core. To Conquer problems exist in the PCI core burst transfer,a design of a synchronous FIFO with backup function based on dual-port RAM and master device burst transfer module is developed. Based on PCI driver development,the measured PCI bus performance is compared between the interface circuit described in this article and PLX9056 manufactured by PLX Corporation. The results showed that the overall performance of the interface circuit designed by FPGA with IP core is superior to PLX9056.

关 键 词：CPCI系统 PCI总线 IP核 驱动开发 

分 类 号：TP273[自动化与计算机技术—检测技术与自动化装置]