USB1.1设备控制器IP核的设计与实现  

Design and Implementation of USB1.1 Device Controller IP Core

作　　者：杨先文[1] 李峥[1] 王安[2] 张宇[1] 

机构地区：[1]解放军信息工程大学电子技术学院,河南郑州450004 [2]山东大学密码技术与信息安全教育部重点实验室,山东济南250100

出　　处：《小型微型计算机系统》2010年第11期2300-2304,共5页Journal of Chinese Computer Systems

基　　金：现代通信国家重点实验室基金项目(9140C1106021006)资助

摘　　要：针对安全USB设备与PC主机数据通信的需要,依据USB1.1标准规范,文章设计一种USB1.1设备控制器IP核.该控制器IP核支持全速模式下控制、批量、中断三种传输方式,且传输端点数可配置.基于FPGA平台,对控制器IP核进行了实现,并在8051的配合下对实现进行了测试.测试结果表明其与主机之间的数据通信是可行的,可应用于SoC集成设计,为密码安全USB设备的开发奠定了基础.Aiming at the need of data transfer between secure USB devices and host computer, a device controller IP core based on USB1.1 protocol is designed in this paper. The IP core supports control, bulk and interrupt mode at full speed, and the mount of its endpoints is configurable. Based on FPGA platform, the implementation of the device controller IP core is achieved, and the tests are given under the cooperation with 8051 MicrocontroUer. The FPGA tests indicate that the IP core can communicate with the host and can be integrated in SoC design. It lays the foundation for the design of secure USB devices in the future.

关 键 词：通用串行总线 USB协议 IP核 FPGA 微控制器 

分 类 号：TP309[自动化与计算机技术—计算机系统结构]