高P_r/低P_r栅FFET漏极电流与铁电材料特性的关系  

Relationship Between the Drain Current of FFET with High P_r/Low P_r Gate Structure and Ferroelectric Material Properties

作　　者：顾江[1] 施敏[2] 王强[2] 蔡小鹏[3] 

机构地区：[1]常熟理工学院物理电子系,江苏常熟200041 [2]南通大学电子信息学院,江苏南通226019 [3]南通大学计算机科学与技术学院,江苏南通226019

出　　处：《微纳电子技术》2010年第11期659-662,673,共5页Micronanoelectronic Technology

基　　金：江苏省自然科学基金资助项目(BK20082317);南通大学自然科学基金资助项目(08Z024);南通大学杏林学院自然科学基金资助项目(2010k120);江苏省大学生创新项目;南通市应用研究计划资助项目(k2010033)

摘　　要：分析了对铁电场效应晶体管漏极电流特性有影响的铁电材料参数,设计了具有单层和双层栅介质结构的铁电场效应晶体管,并进行了仿真研究。仿真结果表明：具有高Pr/低Pr栅介质结构的铁电场效应晶体管在饱和极化后,其极化前后输出漏极电流差最大,有利于存储信号的分辨,提高电路的效率。通过改变该结构中低Pr层的Pr,Ec等铁电材料参数,发现在3-4V间饱和极化,该结构的铁电场效应晶体管的漏极电流输出特性比较稳定,减小了对材料、工艺、Ps/Pr及Ec的依赖性和敏感性,具有易于制造和便于电路设计的优点。The ferroelectric material parameters affecting the drain current of the ferroelectric field effect transistor （FFET） were analyzed. The FFETs with single and double-layer gate structures were designed and simulated. The simulation results show that the drain current difference before and after polarization is maximum after the FFET with high Pr/low Pr gate structures is saturated polarization, which can help to distinguish the signal easily and improve the circuit efficiency. The gate saturated voltage is 3 - 4 V by varying ferroelectric parameters of the low Pr layer, such as Pr, Ec, etc. Applying the saturated voltage, the drain current output of the FFET with the structure is stable and not sensitive to the material properties, process, Ps/Pr and Ec. The device is benefits to the circuit design and fabrication.

关 键 词：铁电场效应晶体管(FFET) 双层栅 铁电材料 漏极电流 极化 仿真 

分 类 号：TN384[电子电信—物理电子学]