基于FPGA动态部分重构的D/TMR系统设计  

D/TMR design of dynamic part reconfigurable system based on FPGA

作　　者：刘斐文[1] 姚睿[1] 

机构地区：[1]南京航空航天大学自动化学院,南京210016

出　　处：《计算机工程与应用》2010年第35期55-57,共3页Computer Engineering and Applications

摘　　要：在空间环境中,系统的可靠性是保障系统正常运行的关键。针对此问题,提出了一种基于FPGA动态部分重构的D/TMR系统设计,正常工作时采用DMR系统,具有较低的面积开销和功耗;当系统出现故障时,利用FPGA部分动态重构技术切换为TMR系统,不需要额外的故障检测与定位电路,就可以保持系统功能的连续性与可靠性。经实验验证,该设计方案具有可行性。In the space environmentr,eliability is the key to ensure normal operation of the system.This paper presents a D/ TMR design of dynamic part reconfigurable system based on FPGA.DMR system is used to work with lower area overhead and power consumption.When the system failsi,t switches to TMR system without additional fault detection and location cir-cuits,using dynamic part of the reconstruction technique.The system can maintain the continuity and reliability of the func-tion.The experimental results show that the design is feasible.

关 键 词：三重模件冗余(TMR) 现场可编程门阵列 动态重构 总线宏 部分重构 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]