低功耗高精度的电压比较器设计  

Design of a Low Power Dissipation and High Precision Voltage Comparator

作　　者：赵海涛[1] 檀柏梅[1] 赵毅强[2] 耿俊峰[2] 

机构地区：[1]河北工业大学微电子研究所,天津300130 [2]天津大学专用集成电路设计中心,天津300072

出　　处：《半导体技术》2011年第1期67-70,共4页Semiconductor Technology

摘　　要：设计了一款用于实现10位精度逐次逼近型模数转换器(SAR ADC)的电压比较器,该比较器采用高速高精度比较器结构并进行了优化,在高速度、低功耗锁存器的基础上加预放大级以提高比较精度,加RS触发器优化处理比较器的输出信号。同时,采用失调校准技术消除失调,预放大级采用共源共栅结构抑制回程噪声,最终获得了高精度和较低的功耗。仿真结果表明:在Chartered 0.35μm 2P4MCMOS工艺下,时钟频率5 MHz,电源电压3.3 V,分辨率达0.1 mV,平均功耗约为0.45 mW,芯片测试结果表明比较器满足了SAR ADC的要求。A voltage comparator for 10 bit successive approximation analog to digital converter （SAR ADC） was presented. The optimization structure of high speed and high precision was adopted in the proposed comparator. Based on the high speed and low power latch, the pre-amplifier stage was employed to improve the precision and RS latch stage was applied to optimize the output signal of this comparator. In addition, the offset can be cancelled out by offset cancellation and the kickback noise was retrained by cascade circuit. Finally, the high precision and lower power were obtained. Simulation results show that the proposed comparator can distinguish 0. 1 mV, consuming 0.45 mW by Chartered 0. 35 μm CMOS technology. Measurement results show that the comparator can meet the request of SAR ADC.

关 键 词：低功耗 前置放大器 失调校准 锁存器 电压比较器 

分 类 号：TN432[电子电信—微电子学与固体电子学]