数字基带传输系统的FPGA设计与实现  

Design and Implementation of FPGA for Digital Baseband Transmission System

作　　者：张水英[1] 金学波[1] 杜晶晶[1] 

机构地区：[1]浙江理工大学,浙江杭州310018

出　　处：《现代电子技术》2011年第1期182-184,188,共4页Modern Electronics Technique

摘　　要：为了提高系统的集成度和可靠性,降低功耗和成本,增强系统的灵活性,提出一种采用非常高速积体电路的硬件描述语言(VHDL语言)来设计数字基带传输系统的方法。详细阐述数字基带传输系统中信号码型的设计原则,数字基带传输系统中信号编码原理和译码原理;采用硬件描述语言来设计数字基带信号编码器和译码器并进行仿真;采用原理图设计方法设计数字基带传输系统并仿真;整个系统的设计在QuartusⅡ平台上完成,并在Altera公司的ACEX1K-EP1K30TC144-1芯片上实现。In order to improve system integration degree and system reliability, reduce power consumption and cost, and improve system flexibility, a method to design digital baseband system with hardware description language （VHDL） adopting the very higt speed integrated circuit is put forward. The design principle of signal pettern in digital baseband system, the en- coding and decoding principles of signal in the digital baseband system are elaborated. The encoder and the decoder for digital baseband signal were designed and simulated with VHDL. The digital baseband system was designed and simulated with schematic diagram design method. The design of the whole system is completed on the platform of Quartus Ⅱ and implemented with ACEX1K-EP1K30TC144-1 of Altera.

关 键 词：数字通信 基带传输系统 VHDL FPGA 

分 类 号：TN914-34[电子电信—通信与信息系统]