可重构幸存路径管理Viterbi译码器的研究与设计  

Study and Implementation of a Reconfigurable Survivor Path Memory Unit for Viterbi Decoder

作　　者：张维津[1] 张科峰[1] 

机构地区：[1]华中科技大学电子科学与技术系,湖北武汉430074

出　　处：《微电子学与计算机》2011年第2期20-22,27,共4页Microelectronics & Computer

基　　金：国家"八六三"计划项目(2006AA01Z226)

摘　　要：根据现代通信系统对自适应性和低功耗的要求,设计了一种自适应的Viterbi译码器,通过设计可重构的幸存路径存储管理单元(SMU),译码器可以根据不同调制方式自适应地选择回溯深度,并通过简化分支度量运算,降低了Viterbi算法中分支度量单元(BMU)和加-比-选单元(ACSU)的复杂度.经FPGA仿真结果表明,该算法性能满足自适应要求,且占用硬件资源低,可降低功耗14%左右,可用于含多速率多调制方式的移动通信系统.An adaptive Viterbi decoder is designed in this paper,based on the demand of adaptive and low power consumption in modern communication systems.The Viterbi decoder can change trace depth automatically by the design of a reconfigurable survivor path memory unit.In this paper we also simplify the branch metric arithmetic,so as to decrease the complexity of the branch metric unit and the add-compare-select unit.According to the simulation result,this design has a small area and has satisfied the demand of adaption,the power consumption can be decreased by 14%.The Viterbi decoder supposed in this paper can be used in communication systems which have kinds of modulation modes.

关 键 词：VITERBI译码器 可重构 低功耗 

分 类 号：TN4[电子电信—微电子学与固体电子学]