基于Loeffler算法的2-D DCT IP软核设计  

Design of 2-D DCT IP Soft Core Based on Loeffler′s Algorithm

作　　者：郭宝增[1] 牛力[1] 刘志明[1] 

机构地区：[1]河北大学电子信息工程学院,河北保定071002

出　　处：《微电子学与计算机》2011年第2期136-139,144,共5页Microelectronics & Computer

基　　金：河北省自然科学基金(F2009000226)

摘　　要：提出一种基于Loeffler算法的2-D DCT IP软核设计方法.用移位和加法运算代替乘法运算.为减少芯片占用面积,对乘法系数采用CSD编码,1-D DCT复用技术;为提高电路的速度,采用流水线结构,优化转置矩阵.基于上述算法,设计了用Verilog HDL语言描述的IP软核.对软核进行了编译、综合、布局布线和后仿真,验证了算法的正确性.实验结果显示最高工作频率可以达到139.43MHz,能够满足视频图像压缩的实时性要求.This paper presents a design of 2-D DCT IP soft core based on Loeffler′s algorithm.We make use of the shifter and addition operations to replace the multiplication operations.In order to save hardware resources,the multiplication factors are coded by CSD,and the technology of 1-D DCT reusing is taken;In order to improve the circuit speed,the pipelining technology is taken,and optimize the transposed matrices is adopted.Based on above-mentioned algorithms the IP soft core with Verilog HDL is obtained.For the IP soft core,we made the compiling,synthesis,layout and post simulation,so the correctness of the design is verified.The experiment shows that design has a maximum frequency of 139.43 MHz,which can satisfy the requirement of real-time video image compression.

关 键 词：1-D DCT Loeffler算法 IP核 图像压缩 

分 类 号：TN47[电子电信—微电子学与固体电子学] TP39[自动化与计算机技术—计算机应用技术]