高速环形FIFO的设计  

Design for High-Speed Circular FIFO

作　　者：彭瑶[1] 周端[2] 杨银堂[1] 朱樟明[1] 

机构地区：[1]西安电子科技大学微电子研究所,西安710071 [2]西安电子科技大学计算机学院,西安710071

出　　处：《计算机辅助设计与图形学学报》2011年第3期488-495,共8页Journal of Computer-Aided Design & Computer Graphics

基　　金：国家自然科学基金(60725415;60971066);国家"八六三"高技术研究发展计划(2009AA01Z258;2009AA01Z260);"宽带隙半超导体"国家重点实验室基金(ZHD200904)

摘　　要：针对全局异步局部同步系统中不同时钟域间的通信问题,提出一种可用于多核片上系统的环形FIFO.采用独特的运行协议和串并结合的数据传输方式以及保证通信质量的双轨编码方法,设计了一种新颖的FIFO体系结构,使其可支持不同宽度数据的发送和接收,保证数据的完整高速传输.在0.18μm标准CMOS工艺下,FIFO的传输延时为681 ps,每响应一个传输请求的平均能耗为6.45 pJ,可满足多核片上系统和片上网络芯片速度高、功耗低、鲁棒性强和重用性好的设计要求.This paper proposes a novel circular FIFO used in multiprocessor system-on-chip （SoC） for the data transfer between different time domains in globally asynchronous locally synchronous systems. With the transmission mode combining both serial and parallel communication, data of different widths can be sent and received quickly by the circular FIFO handled under special operation protocol. Meanwhile, the data integrity is ensured during the communication by the two-rail encoding transfer manner. Based on SMIC 0.18μm CMOS technology, simulation results have shown that the delay is 681ps with the average energy consumption of 6.45 pJ for one transfer request responded, which can meet the requirements of high speed, low power, strong robustness and good reusability in the design of multiprocessor SoC and network on-chip.

关 键 词：高速低功耗 不同时钟域 FIFO 协议 全局异步局部同步 

分 类 号：TN402[电子电信—微电子学与固体电子学]