基于TTA的异步微处理器设计及其VLSI实现  

Design and VLSI Implementation of an Asynchronous Microprocessor Based on Transport Triggered Architecture

作　　者：石伟[1] 陈芳园[1] 王志英[1] 任洪广[1] 苏博 王友瑞[1] 陆洪毅[1] 

机构地区：[1]国防科学技术大学计算机学院,湖南长沙410073

出　　处：《电子学报》2011年第2期395-401,共7页Acta Electronica Sinica

基　　金：国家863高技术研究发展计划基金项目(No.2007AA01Z101);国家自然科学基金(No.60873015;No.60773024;No.60903039);国家973重点基础研究发展规划(No.2007CB310901);国防科技大学校预研项目(No.JC-08-06-02);新教师博士点基金(No.20094307120012)

摘　　要：本文针对传输触发体系结构设计了一款异步微处理器.由于异步TTA采用分布式的控制方式,数据相关会导致程序执行错误,因此提出了一种数据源选择技术来保证程序执行的正确性,并给出了异步TTA的微体系结构与电路实现.最后,在0.18μm工艺下采用基于宏单元的异步集成电路设计方法实现了该异步微处理器.实验结果表明提出的数据源选择技术能够有效保证异步TTA微处理器正确执行,同时异步TTA计算内核功耗仅为相应同步计算内核功耗的40%左右.The design of an asynchronous pipelined microprocessor based on transport triggered architecture is introduced.The distributed control in the asynchronous TTA microprocessor,the data dependence might give rise to a wrong result of the executed program.A data source select scheme is proposed to guarantee instructions running correctly on the asynchronous TTA microprocessor.The micro-architecture of the proposed asynchronous processor is presented,and an asynchronous microprocessor is implemented in an 180nm technology.The experimental results show that the implemented asynchronous microprocessor can run correctly,and the asynchronous circuit style can offer a low power solution for future microprocessor design.The power dissipation of asynchronous TTA core takes only about 40% of the synchronous equivalent.

关 键 词：传输触发结构 异步电路 低功耗 VLSI设计 

分 类 号：TP332.2[自动化与计算机技术—计算机系统结构]