全数字跳频跟踪环设计及其FPGA实现  

Design and FPGA realization of all digital FH tracking loop

作　　者：陈明[1,2] 全厚德[1] 

机构地区：[1]军械工程学院光学与电子工程系 [2]73121部队

出　　处：《信息技术》2011年第3期37-41,共5页Information Technology

摘　　要：针对射频直接采样软件无线电结构在超短波跳频接收机中的应用问题,以FPGA为硬件环境,设计了一种基于能量检测的全数字跳频跟踪环。利用解跳本振的超前滞后支路的能量累积差作为相位误差调整依据,利用浮动双门限方案提高跟踪稳定度和收敛速度。经仿真验证能够以较快的速度消除±0.5Tc(Tc为跳序列的码元持续时间)的相位误差,实现对中频信号的稳定解跳。This paper focuses on the application of RF direct sampling in FH-VHF radio set,designs a total-digital FH tracking loop which based on the checking of energy in FPGA hardware circumstance.This design uses the energy accumulation difference which from the lead-lag sub-channes of dehopping local oscillation as reliance to adjusting of phase error,uses variable-two-threshold to improve stability and convergence rate of the tracking loop.The simulation result proves that it can eliminate the phase error between ±0.5Tc（Tc is the characteristics duration time of FH sequence）,and realizes stabile dehopping for IF signal.

关 键 词：跳频跟踪 数字锁相环 软件无线电 FPGA 

分 类 号：TN914[电子电信—通信与信息系统]