基于SystemGenerator／Simulink的FPGA联合开发方案  

Combined Development Plan of FPGA based on System Generator and Simulink

作　　者：程娟[1] 胡泽明[1] 万方杰[1] 

机构地区：[1]解放军信息工程大学,河南郑州450002

出　　处：《电气电子教学学报》2010年第B10期112-114,117,共4页Journal of Electrical and Electronic Education

摘　　要：SystemGenerator是XilinxXtremeDSP计划的一部分，是业界最便捷的现场可编程门阵列（FPGA）解决方案，与基于硬件描述语言（HDL）的FPGA开发方案相比较，基于SystemGenerator和Simulink的联合开关方案具有操作简单，设计灵活。效率高等优点，是未来的发展方向。正是基于此认识，本文结合实例，描述了基于SystemGenerator和Simulink的联合开关方案，从而给出了FPGA设计的一种新途径。System Generator is an important part of Xilinx Xtreme DSP plan. And it is the easiest development tool of FPGA. Compared with the development tool of HDL, the development project combined System Generator and Simulink is much more simple, flexible and effective. This combined project shows the development direction in the future. In this perspective, this paper presents an example of steganography realized on FPGA and experimental result shows that this method is suit for development of FPGA.

关 键 词：SYSTEM GENERATOR SIMULINK 信息隐藏 

分 类 号：TN402[电子电信—微电子学与固体电子学]