JPEG解码器IP核的设计与实现  

Design and Implementation of IP Core of JPEG

作　　者：张志晓[1] 何明华[1] 

机构地区：[1]福州大学物理与信息工程学院,福建福州350002

出　　处：《电子科技》2011年第4期59-63,共5页Electronic Science and Technology

基　　金：福建省科技重大专项基金资助项目(2009HZ0007);福建省自然科学基金重点资助项目(2007J0003)

摘　　要：介绍了基于静止图像压缩标准JPEG解码器IP核的设计与实现。设计采用适于硬件实现的IDCT算法结构,通过增加运算并行度和流水线技术相结合的方法以提高处理速度。根据Huffman码流特点,采用新的Huffman并行解码硬件实现结构,用简单的算术运算代替复杂的配对模式,解码速度快,硬件成本低。该IP核可方便地集成到诸如数码相机、手机以及扫描仪等各种应用中。The paper presents the design and implementation of a soft decoder IP based on the JPEG image compression standard.The design adopts the IDCT algorithm architecture which is efficient for hardware implementation.In consideration of speed,a parallel and pipeline architecture is introduced.Based on the characteristic of Huffman code a new hardware structure of Huffman parallel decoding is introduced,replacing the complex pattern matching with the simple arithmetic operations,so that high decoding rate and low cost can be achieved.This IP can be conveniently integrated into various applications such as digital camera,cell phone,and color FAX.

关 键 词：JPEG IP核 HUFFMAN 流水线设计 

分 类 号：TN492[电子电信—微电子学与固体电子学]