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机构地区:[1]国防科技大学计算机学院重点实验室,长沙410073
出 处:《物理学报》2011年第7期655-662,共8页Acta Physica Sinica
基 金:国家高技术研究与发展863计划(批准号:2009AA01Z114);国防科技大学优秀研究生创新基金;湖南省研究生创新基金资助的课题~~
摘 要:基于单电子经典理论,本文通过分析得出了单岛单电子晶体管的源漏电导模型,并对其进行了详细的分析讨论.单岛单电子晶体管的源漏电导随着源漏电压的变化发生周期性的振荡衰减,并随着源漏电压的增大逐渐收敛于本征电导值.源漏电导的这种特性受温度、结电阻、结电容等参数的影响.分析结果表明,源漏电导分析模型对单电子晶体管的大规模应用具有非常重要的意义.With the decrease of the feature size of MOS based circuits, the power consumption of micro-processors has dramatically increased during the last decade, which now mainly restricts the development of the micro-processors. Single- electronic transistors (SETs) are considered as the attractive candidates for post-COMS VLSI due to their ultra-small size and low power consumption. Based on Orthodox theory, the model of conductance is investigated in detail. The conductance of SET with single island is in damped oscillation with a period of T(Vds) , and it is close to an intrisical value with the increase of { Vds}. This characteristic of Gds is affected by temperature, parameters of junctions, and so on. The results show that the analysis of conductance is very useful for the very large scale integration of SET devices.
分 类 号:TN321[电子电信—物理电子学]
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