面向实时视觉芯片的高速CMOS图像传感器  

A High-Speed CMOS Image Sensor for Real-Time Vision Chip

作　　者：付秋瑜[1] 林清宇[1] 张万成[1] 吴南健[1] 

机构地区：[1]中国科学院半导体研究所半导体超晶格国家重点实验室,北京100083

出　　处：《光学学报》2011年第8期281-287,共7页Acta Optica Sinica

基　　金：国家自然科学基金(60976023);国家973计划(2011CB932902)资助课题

摘　　要：提出了一种面向实时视觉芯片的高速CMOS图像传感器。该高速图像传感器主要包括CMOS像素单元阵列、相关双采样(CDS)阵列、可编程增益放大(PGA)阵列、单次比较模数转换(ADC)阵列和控制模块。该传感器集成了光信号采集和行并行信号处理等功能,以大于1000frame/s的速度输出数字信号或数字图像,同时实现了行并行方式的固定模式噪声消除、编程控制输出信号动态范围调节、连续8位行并行模数信号转换的功能。采用0.18μm 1P6MCMOS工艺实现了高速图像传感器,芯片面积为2.2mm×2.6mm。测试结果表明,该芯片可以完成实时高速光信号采集及处理,适用于集成高速实时视觉芯片系统。A high-speed CMOS image sensor for real-time vision chip is proposed. The high-speed CMOS image sensor consists of CMOS photodiode array, correlated double sampling （CDS） array, programmable gain amplifier （PGA） array, area-efficient single-slope analog-to-digital converter （ADC） array and controller circuit. It can perform the image capturing and row-parallel signal processing. It outputs digital signal or digital image at a frame rate of over 1000 frame/s. It can reduce the fixed pattern noise （FPN） and amplify （or shrink） the output signals of the photodiode array to maintain the amplitude of the signal in row-parallel fashion. It can continuously perform 8-bit ADC conversion in row-parallel. A 128 pixel×128 pixel image sensor with 128 rows of CDS, PGA and single-slope ADC is fabricated by using 0.18 μm 1P6M CMOS process. The chip size is 2.2 mm×2.6 mm. The measured results demonstrate that the designed chip can perform high-speed real-time optical signal capturing and processing. It can be applied to the real-time vision chip system.

关 键 词：图像处理 CMOS图像传感器 信号处理 视觉芯片 

分 类 号：TN491[电子电信—微电子学与固体电子学]