基于Multisim 11.0的PLD图形化仿真设计与应用  

DESIGN AND APPLICATION OF MULTISIM 11.0-BASED PLD GRAPHICAL SIMULATION

作　　者：李北雁[1] 聂典[2] 

机构地区：[1]天津工业大学计算机软件学院,天津300387 [2]解放军理工大学通信工程学院,江苏南京210007

出　　处：《计算机应用与软件》2011年第8期295-300,共6页Computer Applications and Software

摘　　要：简要介绍CPLD/FPGA(Complex programmable Logic Device/Field programmable Gates Array)器件的特点和应用范围,并以数字钟设计为例,介绍了在Multisim 11.0开发软件下,利用原理图的输入方式来设计数字逻辑电路的过程和方法,突出Multisim 11.0在教学中的重要作用,尤其是对于数字逻辑设计这门课程的学习。并且详细介绍了Multisim 11.0与Quartus II两个软件之间的互通,给出了一条PLD设计由:图形化模块搭建-Multisim系统化仿真-VHDL代码自动生成-Quartus II加载代码-Quartus II中的仿真-下载到硬件电路中-实际应用。整个一个完整的设计过程。In this paper we briefly introduce the features and application area of CPLD/FPGA devices,and by taking the digital clock design as example,describe the process and methods of digital logic circuits design using the input mode of schematic diagrams with development software of Multisim 11,in it the important role of Multisim 11.0 in teaching is highlighted,especially for studying the subject of digital logic design.And the interoperability between two software of Multisim 11 and Quartus II is introduced in detail too.Moreover,in the paper we give a design route of the PLD： Graphical module building-Multisim 11 systematic simulation-automatic VHDL code generation-Quartus II code loading-Simulation in Quartus II-Downloading to the hardware circuit-Practical application.This is an intact designing process.

关 键 词：数字钟 数字逻辑电路设计 NI Multisim11 VHDL QuartusⅡ 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]