基于固件的系统芯片协同验证平台  

A Firmware-Based Co-Verification Platform for SoC

作　　者：李皓[1] 李险峰[2] 庞九凤[1] 黄侃[1] 郑衍松[1] 佟冬[1] 程旭[1] 

机构地区：[1]北京大学微处理器研究开发中心,北京100871 [2]北京大学深圳研究生院,深圳518055

出　　处：《计算机辅助设计与图形学学报》2011年第9期1593-1602,共10页Journal of Computer-Aided Design & Computer Graphics

基　　金：国家"八六三"高技术研究发展计划(2006AA010202);国际科技合作计划(2008DFB10010);国家自然科学基金(60703067)

摘　　要：使用FPGA进行全系统仿真是验证基于平台设计的系统芯片(SoC)的有效手段,但FPGA原型验证一方面须等待硬件设计完成编码,另一方面FPGA全系统环境下的硬件设计错误定位耗时,验证周期较长.为更早展开系统级验证工作并缩短验证周期,提出一种基于固件的协同验证平台——FCVP.FCVP在FPGA上基于固件模拟待测硬件设计和系统模块,通过运行真实工作负载,对比FPGA中待测硬件设计和FCVP模拟参考模型的行为,帮助分析、定位硬件设计错误.在PKUnity86 SoC上进行验证的实例表明,FCVP可用于SoC设计初期验证,并可有效地辅助硬件设计错误的定位.性能评测显示,FCVP模拟性能优于纯软件模拟器.Full-system emulation on FPGA is an effective way for rapid verification of platform-based SoC design.However,FPGA emulation requires complete implementation of key modules and provides weak visibility.It is time-consuming to perform hardware design error localization and design verification.This paper proposes FCVP,a firmware-based co-verification platform,to enable earlier full-system verification and to shorten the verification cycle with FPGA.Based on programming interfaces in firmware,FCVP enables simulation of DUT（design under test） modules and execution of real-world workloads on FPGA directly.Moreover,FCVP helps locate design errors through comparing behavior traces,generated when accessing FPGA DUT module and its simulation model respectively.The practical PKUnity86 SoC verification example demonstrated that FCVP allows early-stage SoC design verification,and also helps identify design errors effectively.In addition,evaluation results show that FCVP achieves better performance than software simulator.

关 键 词：协同验证 系统芯片 固件 全系统模拟器 硬件设计错误 基于平台的设计 

分 类 号：TP306.3[自动化与计算机技术—计算机系统结构]