FPGA的双缓冲模式PCI Express总线设计  

Double Buffering PCI Express Interface Based on FPGA

作　　者：朱伟杰[1] 陆探[1] 朱万经[1] 

机构地区：[1]电子科技大学电子工程学院,成都611731

出　　处：《单片机与嵌入式系统应用》2011年第11期22-25,共4页Microcontrollers & Embedded Systems

摘　　要：介绍了软件无线电平台中基于FPGA的双缓冲模式PCI Express(PCIE)总线的设计与实现。设计了基于Xilinx Virtex-6 FPGA的通用软件无线电平台,开发了基于Linux系统的驱动程序和PCIE硬核的DMA控制器。双缓冲提高了数据传输速度,节约了硬件资源。测试结果显示,该系统工作稳定可靠,读写速度可达402 MB/s。This article introduces the design and implementation of double buffering PCI Express interface based on FPGA, which is ap plied in software-defined radio （SDR） system. A universal SDR platform based on Xilinx Virtex 6 FPGA is designed, and tbe device driver in Linux system and the DMA controller based on Xilinx PCIE core are developed. Double buffering increases the data transfer speed and saves the hardware resource. The test results show that our system works .stably and reliably, and the read and write speed a chieves 402 MB/s.

关 键 词：双缓冲 DMA控制器 PCI EXPRESS FPGA 

分 类 号：TN791[电子电信—电路与系统] TP336[自动化与计算机技术—计算机系统结构]