开关电容Σ-ΔADC的噪声分析与建模  

Noise Analysis and Modeling of Switched Capacitor Σ-ΔADC

作　　者：唐圣学[1] 陈丽[1] 何怡刚[2] 

机构地区：[1]河北工业大学电气工程学院,天津300130 [2]湖南大学电气与信息工程学院,长沙425802

出　　处：《系统仿真学报》2011年第11期2512-2517,共6页Journal of System Simulation

基　　金：国家自然科学基金(50677014;60876022);高校博士点基金(20060532002);国家863计划(2006AA04A104);国家杰出青年科学基金(50925727)

摘　　要：针对电路噪声对开关电容Σ-ΔADC性能的限制,分析了开关电容Σ-ΔADC电路噪声的特征和计算噪声的算法,提出了在时域建立ADC电路噪声模型的建模方法,并采用Simulink仿真工具建立了噪声行为模型。建立了一个三阶四位量化器的开关电容Σ-ΔADC的噪声行为仿真模型,对仿真和测量结果进行了分析与比较,验证了时域模型的有效性。Referring to the major circuitry noise limitation on the performances of switched capacitor sigma-delta analog-to-digital converters （∑-Δ ADC）, the noisy characteristics were analyzed and an algorithms to calculate the noise power was proposed. Next, the noisy behavioral modeling in time-domain was performed with the Simulink tool. A noisy behavioral simulation model for the three-order four-bit quantizer switched capacitor ∑-ΔADC was established. The corresponding simulation results were analyzed and compared with the measured data, which verified its validity.

关 键 词：开关电容 SIMULINK 噪声建模 ∑-ΔADC 

分 类 号：TN792[电子电信—电路与系统]