基于FPGA的电机测速电路设计与实现  

Design and implementation for tachometer circuit of motor based on FPGA

作　　者：李大英[1] 

机构地区：[1]重庆工业职业技术学院,重庆401120

出　　处：《机械设计与制造》2011年第12期78-80,共3页Machinery Design & Manufacture

基　　金：国家十一五国家科技支撑计划重点项目(2009BAF24B01)

摘　　要：为了满足运动控制系统中电机及其他场合测速、测频的要求,提出了一种基于等精度测频原理的频率计,并通过编码器信号不同的处理方法的对比给出了一种基于FPGA的设计方案,使系统能够完成对电动机转速参数和数据的采集和显示。在QuartusII开发软件环境下,采用硬件编程语言Verilog HDL,实现了电机转速精确的的测量。经在实际应用证明,该系统安全可靠、运行稳定、操作灵活、抗干扰能力强、使用方便,编码器信号四倍频后的测速电路精度可达百万分之一。In order to meet the requirement of motor speed and frequency measurement in the tootion control system or other systems ,one proposal of the frequency meter based on the equal-precision frequency measurement principle was introduced.And one design proposal based on FPGA was raised to enable the system to collect and display the parameters and data for motor＇s rpm by comparing different en- coder signal processing methods.Meanwhile the accurate measurement for rpm of the motor was realized through hardware programming language Verilog HDL under the QuartusII development software environ- ment.The actual application confirmed that the system is safe and reliable ,stable in running,flexible in operation and easy to use with strong anti-interference ability.The precision of the tachometer circuit of the encoder signal after quadrupling had been confirmed to be one millionth.

关 键 词：等精度 频率计 FPGA VERILOG HDL 

分 类 号：TH16[机械工程—机械制造及自动化] TN79[电子电信—电路与系统]