基于电流控制模式的低压、高PSRR基准源  

A Low Voltage High PSRR Reference Source Based on Regulated Current Mode Structure

作　　者：张慧敏[1] 周云[1] 王璐霞[1] 袁凯[1] 

机构地区：[1]电子科技大学光电信息学院电子薄膜与集成器件国家重点实验室,成都610054

出　　处：《微处理机》2011年第5期22-25,共4页Microprocessors

基　　金：国家自然科学基金资助(61021061)

摘　　要：基于可调电流控制模式设计出一种低压、高电源抑制比的带隙基准电压源电路。采用电流控制模式和多反馈环路,提高电路的整体电源抑制比;通过电阻分压的方式,使电路达到低压,同时提供偏压,简化偏置电路。采用0.5μmCMOS N阱工艺,电路可在电源电压为1.5V时正常工作。使用Cadence Spectre进行仿真结果表明,低频时电源抑制比(PSRR)高达107dB。-10℃～125℃温度范围内,平均温度系数约7.17ppm/℃,功耗仅为0.525mW。此电路能有效地抑制制程变异。A new bandgap voltage reference circuit with low voltage, high power supply rejection ratio （PSRR） based on a regulated current mode structure is presented. The proposed circuit utilizes a regulated current mode structure and some feedback loops to improve the overall PSRR. Using resistive subdivision reaches a low voltage and provides the bias voltage of transistors, simplified bias circuit. The circuit was designed with 0.5 μm complementary metal oxide semiconductor transistor （CMOS） N - well technology, which worked at 1.5V power voltage. Cadence Spectre simulation results show PSRR is 107dB at low frequencies, the temperature coefficient from - 10℃ to 125℃ temperature range is 7.17 ppm/℃and the power consumption is only 0. 525mW. This circuit shows robustness against process variation.

关 键 词：CMOS基准电压源 独立电流模式 低电压 高电源抑制比 

分 类 号：TN4[电子电信—微电子学与固体电子学]