单栅和双栅多晶硅薄膜晶体管的二维器件仿真  

Two-dimensional Simulation of Single-gate and Double-gate Polysilicon Thin Film Transistors

作　　者：邓婉玲[1] 黄君凯[1] 

机构地区：[1]暨南大学信息科学技术学院电子工程系,广州510630

出　　处：《光电子技术》2011年第3期157-161,共5页Optoelectronic Technology

基　　金：教育部科学技术研究重点项目(211206);中央高校基本科研业务费专项资金资助(21611422);广东高校优秀青年创新人才培养计划(育苗工程)项目(LYM10032)

摘　　要：二维器件仿真是揭示半导体器件物理机理的有效途径。首先利用二维器件仿真工具构建单栅和双栅多晶硅薄膜晶体管(TFT),并完整地考虑晶界陷阱态的分布规律,即指数分布的带尾态和禁带中央高斯分布的深能态。同时,改变晶界陷阱密度、多晶硅薄膜厚度、温度等条件,以及考虑翘曲(k ink)效应,仿真单栅和双栅器件的电流-电压(I-V)特性,分析物理规律,建立对多晶硅TFT器件物理特性的进一步理解。The two-dimensional simulation is an efficient method to reveal physical principle of semiconductor devices,which is used to construct the single-gate and double-gate polysilicon thin film transistors （TFT） in this paper. Distribution of density of states has been completely taken into account： exponential tail states and Gaussian deep states near mid-gap. Further under- standing is established by simulating the I-V characteristics of single-gate and double-gate de- vices, when considering kink effect and changing conditions of densities of states, thickness of polysilicon film, and temperature.

关 键 词：多晶硅薄膜晶体管 二维器件仿真 陷阱态密度 

分 类 号：TN303[电子电信—物理电子学]