基于FPGA的空时编译码器实现  

A New and Better Design of Space-Time Encoder and Decoder Based on Field Programmable Gate Array

作　　者：包涛[1] 张会生[1] 董群峰[2] 

机构地区：[1]西北工业大学电子信息学院,陕西西安710129 [2]咸阳师范学院,陕西咸阳712000

出　　处：《西北工业大学学报》2012年第1期17-21,共5页Journal of Northwestern Polytechnical University

基　　金：陕西省教育厅专项科研计划(2010JK891)资助

摘　　要：基于高速多输入多输出(Multi-input Multi-output,MIMO)系统中的空时编码技术,提出了一种能够在现场可编程门阵列(Field Programmable Gate Array,FPGA)上实现空时码编译码器的硬件实现方法,并给出了编译码过程中各步骤的实现过程。采用该方法设计的编译码器具有控制单元简单、模块结构规则,易于FPGA实现,可用于高速场合等特点。仿真分析表明,硬件实现的性能与理论性能接近。Sections 1, 2 and 3 of the full paper explain the design mentioned in the title, which we believe is new and better than previous ones. Their core consists of： ＂The space-time coding techniques in high-speed Multi-Input Multi-Output （MIMO） systems were researched in this study. Based on the principle of space-time codes by Alam- outiE11 , a new design of space-time encoder and decoder on Field Programmable Gate Array （FPGA） were presented, and the implementation processes of each step of the encoding and decoding process were also given. The encoder and the decoder so designed not only effectively simplifies the control unit and not only has the regular modular structure, but also is easy for FPGA implementation and can be used on high-speed occasions. ＂ Simulation results, presented in Figure 2, and their analysis show preliminarily that the performance of FPGA implementation is very close to that of theoretical model and that our design is indeed better than previous ones.

关 键 词：信道编码 空时码 编码器 译码器 

分 类 号：TN911.22[电子电信—通信与信息系统]