应用于语音信号处理的FPGA并行访问设计  

FPGA-Based Parallel Access Design for Applications of Voice Signal Processing

作　　者：朱永金[1] 成友才[1] 

机构地区：[1]四川职业技术学院电子电气系,四川遂宁629000

出　　处：《电子科技大学学报》2012年第1期158-160,共3页Journal of University of Electronic Science and Technology of China

摘　　要：为了实现实时语音处理,利用FPGA并行访问的特性,采用低地址物理存储空间由FPGA可配置逻辑模中的存储资源实现;高地址的物理存储空间由存储阵列实现,设计了动态置换算法来控制逻辑地址空间到物理空间的映射,将频繁访问且冲突概率高的数据块映射到低地址的物理存储空间上。实验数据表明,采用并行访问控制的动态置换算法能够实现稳定的访存性能。In order to realize real-time voice processing,a parallel access design based on FPGA is proposed.Low memory space is implemented by distributed CLBs while the high memory space is constructed by the embedded arrays on FPGA.The mapping from logical memory to physical memory is introduced.With the help of dynamical replacement algorithm,the frequently accessed memory block is mapped into low memory space.Our experiment results show that,the dynamic replacement algorithm keeps memory access performance in a suitable range.

关 键 词：动态置换 FPGA 并行访问 语音信号处理 

分 类 号：TP393.03[自动化与计算机技术—计算机应用技术]