使用模式分解方法的过孔串扰机制研究  

New model decomposed method to simulate the crosstalk between vias

作　　者：申振宁[1,2] 庄奕琪[1] 曾志斌[1] 

机构地区：[1]西安电子科技大学宽禁带半导体材料与器件教育部重点实验室,陕西西安710071 [2]武警工程学院通信工程系,陕西西安710086

出　　处：《西安电子科技大学学报》2012年第1期49-55,104,共8页Journal of Xidian University

基　　金：国家自然科学基金资助项目(60276028);武警工程学院基础研究基金资助项目(WJY-201022);中央高校基本科研业务费专项资金资助项目(K5051125007)

摘　　要：提出了一种基于模式分解的高速互连电路中过孔串扰机制的快速求解方法.该方法将三维互连结构分解为在过孔位置处耦合的电源平面对结构和微带线结构,先单独分析3种结构,再将其级联以求解整个系统特性.与全波仿真方法相比,该方法在保证准确度的前提下,可将仿真时间从187min降低至4min.分析了电路板和过孔结构对系统性能的影响,发现频域串扰系数与电源平面结构在过孔位置处的传输阻抗成正比关系.在实际设计中,可通过减小电源平面对结构厚度、添加去耦电容和选择适当的过孔位置来减小串扰.时域仿真表明,合适的互连结构可将串扰噪声幅度降低至原有结构的2%.A model decomposed method is proposed for efficient simulation of crosstalk between vias in high speed circuits.The 3D interconnect structure is first decoupled into a power-ground plane pair and a microstrip line structure which are coupled in the vias,then we solve each parts by using different methods,and finally,the equivalent circuits of each part are integrated to simulate the system performance.Compared with full wave simulation,the simulation time is reduced from 187 minutes to 4 minutes with considerable accuracy.The structure of the printed circuit board and vias that affect the system performance are analyzed carefully,and it is found that the crosstalk coefficient is approximately proportional to the magnitudes of transform impedance in the location of vias in the frequency domain.Some engineering implications on reducing crosstalk noise in practical PCB,such as using a thin dielectric layer,adding decoupling capacitors and adjusting the locations of the vias,are discussed through a series of simulation.The time domain simulation result shows that the magnitude of crosstalk noise is reduced by over 98% when the interconnect structure is designed properly.

关 键 词：高速电路 电磁兼容 串扰 传输阻抗 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]