一种3．1-10．6GHz超宽带低噪声放大器设计  

Design of a 3.1～10.6GHz Ultra Wideband Low Noise Amplifier

作　　者：张滨[1] 杨银堂[1] 李跃进[1] 

机构地区：[1]西安电子科技大学微电子学院,宽禁带半导体材料与器件教育部重点实验室,西安710071

出　　处：《微波学报》2012年第1期49-52,61,共5页Journal of Microwaves

基　　金：国家自然科学基金(60725415)

摘　　要：设计了一种基于TSMC 0.13μm CMOS工艺,用于3.1～10.6GHz带宽的CMOS低噪声放大器。输入级采用共栅极结构,在宽频带内能较好地完成输入匹配。放大级采用共源共栅结构,为整个电路提供合适的增益。输出则采用源极输出器来进行输出匹配。使用ADS2006软件进行设计、优化和仿真。仿真结果显示,在3.1GHz～10.6GHz带宽内,放大器的电源电压在1.2V时,噪声系数低于2.5dB,增益为20.5dB,整个电路功耗为8mW。A new design of 3.1 - 10.6GHz CMOS UWB LNA using TSMC 0. 13μm process was proposed in this paper. Common-gate structure was used in the input stage leads to better input matching. Cascode structure is used in the second stage to increase the gain. Simulation and optimization of LNA have been done by ADS2006. Results show noise figure of the ampli- fier is below 2.5dB under working voltage of 1.2V in 3.1 - 10.6GHz, gain is 20.5＋0.5dB and power consumption is 8roW.

关 键 词：低噪声放大器 超宽带 增益 噪声系数 共源共栅 

分 类 号：TN722.3[电子电信—电路与系统]