基于SRIO总线的数字信号处理系统的实现  

Implementation of Digital Signal Processing System based on SRIO Bus

作　　者：李少龙[1] 高俊[1] 娄景艺[1] 邱昊[1] 

机构地区：[1]海军工程大学电子工程学院,湖北武汉430033

出　　处：《通信技术》2012年第5期101-103,106,共4页Communications Technology

摘　　要：高速数字信号处理系统及其内部数据的交换通常需要很高的数据传输速度,传统的PCI并行总线由于传输速度受限难以满足实际需求。RapidIO总线采用点对点包交换技术,具有高宽带,低延迟及高可靠性等特点,为系统内部高速互连提供了很好的解决方案。该文通过对该协议的研究,掌握了实现该协议的关键技术,并采用RapidIO技术,提出了基于串行RapidIO的数字信号处理系统框架,并运用StratixⅡ系列FPGA芯片及Tsi578芯片实现该系统。High-speed digital signal processing system and internal data exchange always require fast data transfer speed,traditional PCI parallel bus,due to its limited transport speed,could’t meet the practical needs.RapidIO bus,with point-to-point packet-switching technology,could provide a good solution for high-speed interconnection in the system.Based on study of the protocol,knowledge of its key technologies,and RapidIO,a digital signal processing system framework based on serial RapidIO is proposed,and with stratixⅡ FPGA chip and Tsi578 chip,this system is successfully implemented.

关 键 词：串行RAPIDIO Tsi578 数字信号处理 

分 类 号：TN914.3[电子电信—通信与信息系统]