基于FPGA的高速多路视频数据采集系统  

Acquisition System for High-speed Multi-channel Video Data Based on FPGA

作　　者：赵宏阳[1] 丁晓明[1] 

机构地区：[1]北京交通大学计算机与信息技术学院,北京100044

出　　处：《单片机与嵌入式系统应用》2012年第7期56-58,62,共4页Microcontrollers & Embedded Systems

基　　金：北京市教育委员会产学研联合研究生培养基地建设项目(项目编号:BJ2010-S-02)

摘　　要：针对同时处理高速多路视频数据的需求,以NiosII软核CPU为核心,通过在FPGA上构建可编程片上系统(Sys-tem On Programmable Chip,SOPC),利用SOPC系统自定义外设接口,配合DMA技术,完成对A/D转换后的多路视频数据的同时解码采集。视频解码模块采用滑动窗法快速检测定时基准信号。FPGA可重构的特性可以使系统根据实际应用需要在原方案基础上扩展、裁减功能模块,并根据资源情况重构系统,达到资源与效率的最优匹配。Aiming at the demand of processing high-speed multi-channel video data at the same time, taking NiosII soft-core CPU as the core,System On Programmable Chip（SOPC） is constructed on FPGA, and synchronous decoding acquisition of multi-channel video data after A/D convertion is realized using peripheral interfaces customized by SOPC system and DMA technology. Video decoding module uses sliding window method to rapidly detect timing benchmark signals. Because of the reconfigurahle characteristics of FPGA,the sys- tem realizes the extension on the basis of the original proposal and the cutting of function module aecoroding to actual application. And the system can be reconstructed according to resource condition, so as to realize the optimal matching of resource and efficiency.

关 键 词：FPGA NIOS IP核 多路数据采集 视频解码 

分 类 号：TP274.2[自动化与计算机技术—检测技术与自动化装置]