基于FGPA的数字密码锁  

FPGA-based Digital Code Lock

作　　者：杜振华[1] 谌海云[1] 赵松柏[1] 

机构地区：[1]西南石油大学

出　　处：《电子技术（上海）》2012年第6期32-34,共3页Electronic Technology

基　　金：西南石油大学创新基金项目立项审批编号:GIFSS1113

摘　　要：采用VHDL硬件描述语言,以自顶向下的设计方法,在QuartusⅡ 9.1的开发环境下,设计了基于FPGA的数字密码锁。并选用ALTERA公司Cylone Ⅱ系列的EP2C35F672C8芯片为其硬件条件,验证了其功能及可靠性。结果表明,本设计高效、稳定、可靠!A FPGA-based digital code lock is designed adopting VHDL hardware description language, and the top-down design method, and under Quartus II 9.1 development environment. In the design the EP2C35F672C8 chip from ALTERA company＇s Cylone II series is chosen as its hardware conditions to verify its function and reliability. The results show that the design is efficient, stable and reliable!

关 键 词：现场可编程逻辑门阵列 VHDL 数字密码锁 Quartus Ⅱ 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]