双n型深阱隔离式高压n型沟道LDMOS器件设计  

Design of Isolated High Voltage n-Channel LDMOS Device with Double Deep n-Well

作　　者：孙尧 刘剑 段文婷 陈瑜 陈华伦 

机构地区：[1]上海华虹NEC电子有限公司,上海201206

出　　处：《半导体技术》2012年第8期603-607,共5页Semiconductor Technology

摘　　要：为了进一步优化高压LDMOS器件的耐压和比导通电阻的关系,提出了一种新颖的隔离式双n型深阱高压n型沟道LDMOS器件结构。采用独特的双n型深阱结构工艺替代传统结构工艺中的单n型深阱,解决了垂直方向上的pnp(p型阱-DNW-p型衬底)穿通问题和横向漏端扩展区的耐压与比导通电阻的优化问题的矛盾。器件仿真和硅晶圆测试数据显示,在0.35μm的工艺平台上,采用新结构的器件在满足100 V的耐压下,比导通电阻达到122 mΩ·mm2。同时,非埋层工艺使成本大幅下降。For improvement device breakdown voltage（BV）and specific on resistance（Rdson）trade-off,a novel isolated high voltage（HV）n-channel LDMOS device was introduced.With unique double deep n-type well（DNW）structure and process to replace traditional single deep n-well structure and process,the punch through voltage at vertical direction and breakdown voltage at lateral direction were optimized respectively.Both device simulation and silicon bench results show that novel LDMOS can achieve Rdson of 122 mΩ·mm2 with BV of 100 V using 0.35 μm technology.Meanwhile the cost is also effectively reduced by using the non-buried-layer process.

关 键 词：双n型深阱 隔离式高压n型沟道LDMOS 击穿电压 比导通电阻 非埋层工艺 

分 类 号：TN386[电子电信—物理电子学]