MPEG-4视频解码器中IDCT模块的MMA前端设计  

Design of Front-end of MMA of IDCT Module in MPEG-4 Video Decoder

作　　者：王姝 马英海 

机构地区：[1]辽阳市科技情报所,辽宁辽阳111019

出　　处：《自动化应用》2012年第7期23-25,共3页Automation Application

摘　　要：面向移动多媒体终端SOC设计了一种二维IDCT硬件加速器,基于快速LLM算法实现了8点IDCT运算,使用单RAM转置存储器进行行列分解,采用流水线技术,提高了处理速度,同时降低了芯片面积。A high performance 2D-IDCT hardware accelerator with 8 point IDCT for mobile multimedia terminal SCO is designed. Row-column decompose is implemented through single RAM transpose ram. The advangtages of using pipeline strcture is increasing the processing speed and decreasing the area of the chip.

关 键 词：MPEG-4 视频解码 反余弦变换 超大规模集成电路 多媒体加速单元 

分 类 号：TN919.81[电子电信—通信与信息系统]