45nm工艺下8管双阈值SRAM单元的研究  

Study on 8T Dual-Threshold Voltage SRAM Cell in 45 nm Process

作　　者：刘文斌[1] 汪金辉[1] 吴武臣[1] 

机构地区：[1]北京工业大学集成电路与系统研究室,北京100124

出　　处：《微电子学》2012年第4期511-514,517,共5页Microelectronics

基　　金：北京工业大学博士启动基金资助项目(X0002013201103);国家自然科学基金资助项目(60976028)

摘　　要：比较分析了8管SRAM单元在不同双阈值组合情形下的性能,为不同需求的设计者提供了在静态噪声容限(SNM)、漏功耗和延迟之间做出合理权衡的参考。仿真结果表明,组合C8具有最大的SNM,高阈值晶体管Mnl可以有效抑制漏电流。最后,分析了不同组合下的读写延迟时间,并给出了延迟差异的原因。Performance of an 8T SRAM cell in various dominant dual-threshold voltage configurations was evaluated and analyzed,to provide the designer with a reference for reasonable trade-off between static noise margin(SNM),leakage power and delay.Results from simulation showed that Configuration 8(C8) had the highest SNM,and that high threshold voltage transistor Mnl could suppress the leakage current effectively.Finally,write/read delay time in different dual-threshold voltage configurations was analyzed,and reasons for variation in delay time were derived.

关 键 词：静态随机存取存储器 静态噪声容限 漏功耗 读写延迟 

分 类 号：TN[电子电信]