KLT织物疵点检测算法研究及FPGA实现  

Study and implementation of FPGA-based KLT algorithm for fabric inspection system

作　　者：朱学亮[1] 柴志雷[1] 梁久祯[1] 钟传杰[1] 

机构地区：[1]江南大学物联网工程学院,江苏无锡214122

出　　处：《计算机工程与应用》2012年第24期144-148,共5页Computer Engineering and Applications

基　　金：国家自然科学基金(No.60703106);四川省科技支撑计划项目(No.2008GZ0145)

摘　　要：提出了一种基于FPGA的织物疵点检测系统的实现方案,设计在充分利用FPGA的并行体系架构和丰富的块存储资源的情况下引入KLT(Kanade-Lucas-Tomasi)特征点检测算法对织物疵点进行实时检测,以灵活的硬件可编程来满足KLT检测算法的调整以适应不同的检测要求。经验证,系统可以在实际的应用中准确地检测出织物上的疵点,且检测灵活方便。A new fabric inspection system based on FPGA is presented.Making use of FPGA＇s parallel structure and rich memory resource design KLT detection algorithm is exploited to do real-time detection and the flexibility of programmed hardware can satisfy the adjust of KLT detection algorithm so as to adapt to different detection requirements.The verification indicates that the design can satisfy the requirements of practical application well and make the detection flexible and convenient.

关 键 词：现场可编程门阵列(FPGA) 图像处理 KLT算法 织物疵点检测 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]