基于FPGA的异步电动机变频调速系统  

Variable frequency driver system of asynchronous motor based on FPGA

作　　者：吴俊[1] 邱建琪[1] 史涔溦[1] 王莉[2] 

机构地区：[1]浙江大学电气工程学院,浙江杭州310027 [2]安徽医学高等专科学校基础学部,安徽合肥230601

出　　处：《机电工程》2012年第8期941-944,共4页Journal of Mechanical & Electrical Engineering

摘　　要：针对传统的单片机(MCU)或数字信号处理器(DSP)以软件方式实现的控制系统普遍存在速度慢、稳定性差等问题,以实现全数字电机控制器的集成化为背景,提出了一种基于现场可编程门阵列(FPGA)的空间电压矢量脉宽调制(SVPWM)硬件设计方案,并结合EDA模块化的设计方法和Verilog HDL硬件描述语言,在一片FPGA芯片中得到了验证和实现;采用"top-down"设计思想,对系统按功能划分模块进行了设计;首先对各功能模块进行了设计、仿真、验证,然后将整个系统组合起来进行了仿真、验证,最后利用FPGA进行了硬件验证;在此基础上,完成了异步电机SVPWM调制方式的V/F开环变频调速系统的实验。研究结果表明,该系统稳定性高、占用资源少、复用性高,在实时性、灵活性等方面有着MCU、DSP无法比拟的优越性,为设计高性能的电机控制专用芯片奠定了基础。Aiming at the slow speed and poor stability of control system designed by traditional micro control unit（MCU）or digital signal processor（DSP） in the way of software, a hardware designed scheme of space vector pulse width modulation （SVPWM） based on field programmable gate array （FPGA）was presented, which based on the background of full digital motor-controller. Combining complished EDA design methodology and Verilog HDL, it was verified and implemented on one-chip FPGA. The ＂top-down＂ theme was used to develop core by dividing system according to it＇s function in the design. It was realized that, at first, design and simulation on single module, secondly, on the whole system, at last verification using FPGA. The algorithm was proved feasible through the simulation and experiment. On the basis of the platform, V/F open loop speed regulation system experiment was completed. The results indicate that the system has excellent stablity characteristic, reasonable chip utility, good reusability, superiority that the MCU and DSP do not have in real time, flexibility etc., and lays the foundation for the design of a special motor-controlling chip.

关 键 词：异步电动机 现场可编程门阵列 V/F变频调速系统 空间电压矢量脉宽调制 

分 类 号：TM341[电气工程—电机] TH39[机械工程—机械制造及自动化]