基于FPGA的千兆以太网设计  

Design of gigabit Ethernet system based on FPGA

作　　者：韦宏[1] 付友涛[1] 孔凡鹏[1] 孙洁[1] 刘金涛[1] 

机构地区：[1]中国海洋大学,山东青岛266100

出　　处：《现代电子技术》2012年第18期56-59,共4页Modern Electronics Technique

基　　金：国家自然科学基金资助项目:饱和脉冲三维激光荧光效率谱活体浮游植物分类研究(40976060)

摘　　要：千兆以太网拥有传输速度快、传输距离远、稳定可靠等优点,是当前嵌入式系统的应用热点。FPGA拥有丰富的逻辑和管脚资源,常用于高速数据处理和通信的嵌入式系统。本文描述一个基于FPGA的千兆以太网系统的设计,本设计在硬件上主要使用千兆以太网PHY芯片88E1111和Altera公司的StratixⅢ系列的FPGA,在FPGA的逻辑上实现NiosⅡ嵌入式系统和以太网的MAC控制器,在NiosⅡ系统的软件上移植入MicroC/OS-Ⅱ实时多任务操作系统和NicheStackTCP/IP协议堆栈。在FPGA上实现千兆以太网设计,有效提高了系统的可靠性和集成性,充分扩展FPGA的功能。AGigabit Ethernet, which has advantages with high-speed transmission, long-distance transmission, high stability and reliability, plays an important role in the current embedded systems. FPGA has rich logic and pins resources, which is often used in high-speed data processing and communication embedded systems. A gigabit Ethernet system is described in this paper. A PHY chip 88E111 and FPGA in Altera Stratix Ⅲ series are used in this system. Nios Ⅱ embedded system and Ethernet MAC controller are implemented in FPGA, and MicroC/OS-Ⅱ real-time multitask operating system and NicheStack TCP/IP protocol stack are transplanted into Nios Ⅱ software system. The design of the gigabit Ethernet system was achieved on FPGA. It improved the reliability and integration of the whole system, and extended the functions of FPGA：

关 键 词：千兆以太网 FPGA PHY TCP/IP 

分 类 号：TN919-34[电子电信—通信与信息系统] TN919.6[电子电信—信息与通信工程]